fpga
- group fpga
Driver for configuring the SPI-controlled FPGA.
It controls the low-level read/write with the registers and bulk data transfer. It provides a higher level API for:
the FPGA itself,
the Camera data path,
the Microdisplay data path,
the Microphone data,
the Checksum calculation,
Defines
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fpga_check_reg(reg)
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FPGA_BUFFERS_SUPPORTED
number of capture buffers supported
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FPGA_NUM_VIDEO_FRAMES
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FPGA_FRAME_SIZE
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FPGA_SYSTEM_CONTROL
RW.
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FPGA_DISPLAY_CONTROL
RW.
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FPGA_MEMORY_CONTROL
RW.
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FPGA_LED_CONTROL
RW.
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FPGA_CAMERA_CONTROL
RW.
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FPGA_SYSTEM_STATUS
RO.
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FPGA_WR_BURST_SIZE_LO
RW.
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FPGA_WR_BURST_SIZE_HI
RW.
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FPGA_BURST_WR_DATA
RW.
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FPGA_RD_BURST_SIZE_LO
RW.
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FPGA_RD_BURST_SIZE_HI
RW.
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FPGA_BURST_RD_DATA
RO.
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FPGA_CAPTURE_CONTROL
RW.
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FPGA_CAPTURE_STATUS
RO.
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FPGA_CAPTURE_SIZE_0
RO.
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FPGA_CAPTURE_SIZE_1
RO.
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FPGA_CAPTURE_SIZE_2
RO.
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FPGA_CAPTURE_SIZE_3
RO.
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FPGA_CAPT_FRM_CHECKSUM_0
RO.
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FPGA_CAPT_FRM_CHECKSUM_1
RO.
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FPGA_REPLAY_RATE_CONTROL
RW.
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FPGA_MIC_CONTROL
RW.
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FPGA_CAPT_BYTE_COUNT_0
RO.
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FPGA_CAPT_BYTE_COUNT_1
RO.
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FPGA_CAPT_BYTE_COUNT_2
RO.
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FPGA_CAPT_BYTE_COUNT_3
RO.
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FPGA_VERSION_MINOR
RO FPGA build minor version number.
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FPGA_VERSION_MAJOR
RO FPGA build major version number.
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FPGA_REGISTER_EXISTS(reg)
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BIT(n)
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FPGA_RST_SW
Software reset. Set to 1, it will auto-reset to 0.
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FPGA_SYSTEM_CONTROL_DEFAULT
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FPGA_EN_RB_SHIFT
enable Red Blue shift (for display optics compensation)
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FPGA_DISP_BARS
display 8 vertical color bars
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FPGA_DISP_BUSY
display busy indicator (grey screen)
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FPGA_DISP_CAM
display on, video from camera/buffer
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FPGA_DISP_OFF
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FPGA_DISPLAY_CONTROL_DEFAULT
default value on reboot/reset
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FPGA_MEMORY_CONTROL_DEFAULT
default value on reboot/reset
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FPGA_LED_CONTROL_DEFAULT
default value on reboot/reset
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FPGA_EN_LUMA_COR
enable luma correction for zoom mode
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FPGA_EN_ZOOM
enable zoom
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FPGA_ZOOM
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FPGA_ZOOM_SHIFT
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FPGA_ZOOM_MASK
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FPGA_EN_CAM
enable camera
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FPGA_EN_XCLK
enable 24MHz XCLK to camera
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FPGA_CAMERA_CONTROL_DEFAULT
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FPGA_CAPT_FIFO_UNDERRUN
camera FIFO underrun (empty error)
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FPGA_CAPT_FIFO_OVERRUN
camera FIFO overrun (full error)
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FPGA_CAM_FIFO_UNDERRUN
camera FIFO underrun (empty error)
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FPGA_CAM_FIFO_OVERRUN
camera FIFO overrun (full error)
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FPGA_RD_ERROR
read error
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FPGA_WR_ERROR
write error
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FPGA_MEM_INIT_DONE
memory initialization done
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FPGA_SYSTEM_STATUS_DEFAULT
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FPGA_CLR_CHKSM
[1] clear checksum calculation for previously captured frame/video/audio
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FPGA_RESUME_FILL
[1] resume video; only effective if eAPT_EN is set
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FPGA_RD_AUDIO
select for read (after capture) of audio
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FPGA_CAPT_AUDIO
select for capture of audio (can be with video)
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FPGA_CAPT_VIDEO
select for capture of video
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FPGA_CAPT_FRM
select for capture of single frame
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FPGA_CAPT_EN
[1] enable capture, use together with 1 or 2 of CAPT_FRM, _VIDEO, _AUDIO
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FPGA_CAPTURE_CONTROL_DEFAULT
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FPGA_VIDEO_CAPT_DONE
Last byte of video capture read. Indicates captured video read completely.
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FPGA_AUDIO_CAPT_DONE
Last byte of audio capture read. Indicates captured audio read completely.
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FPGA_FRAME_CAPT_DONE
Last byte of frame capture read. Indicates captured frame read completely.
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FPGA_START_OF_CAPT
Start of capture indicates start of video frame or start of audio. This is to make sure that the MCU is in sync with FPGA.
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FPGA_CAPT_RD_VLD
Captured data is valid and available for read.
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FPGA_CAPTURE_STATUS_DEFAULT
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FPGA_REP_RATE_CONTROL
in replay mode, number of times each frame in buffer is repeated to OLED
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FPGA_REP_RATE_SHIFT
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FPGA_REP_RATE_MASK
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FPGA_REPLAY_RATE_CONTROL_DEFAULT
default value on reboot/reset
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FPGA_EN_MIC
enable mic
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FPGA_MIC_CONTROL_DEFAULT
default value on reboot/reset
Functions
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void fpga_prepare(void)
Preparations for GPIO pins before to power-on the FPGA.
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void fpga_init(void)
Initial configuration of the registers of the FPGA.
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void fpga_deinit(void)
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void fpga_write_register(uint8_t addr, uint8_t byte)
Write a byte to the FPGA over SPI using a bridge protocol.
- Parameters
addr – The address of the FPGA to write to.
byte – The byte to write on that address.
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uint8_t fpga_read_register(uint8_t addr)
Read a byte to the FPGA over SPI using a bridge protocol.
- Parameters
addr – The address of the FPGA to read from.
- Returns
The value read at that address.
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void fpga_write_burst(uint8_t *buf, uint16_t len)
Write a multi-byte burst of byte to the FPGA over SPI.
The address is implicit.
- Parameters
buf – The buffer containing the data.
len – The size of that buffer.
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void fpga_read_burst(uint8_t *buf, uint16_t len)
Read a burst of data from the FPGA.
The address is implicit.
- Parameters
data – The buffer that will be written to.
len – The number of bytes to read onto that buffer.
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uint32_t fpga_get_capture_size(void)
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uint32_t fpga_get_bytes_read(void)
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uint16_t fpga_get_checksum(void)
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uint16_t fpga_calc_checksum(uint8_t *bytearray, uint32_t len)
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uint16_t fpga_checksum_add(uint16_t checksum1, uint16_t checksum2)
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bool fpga_is_buffer_at_start(void)
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bool fpga_is_buffer_read_done(void)
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bool fpga_test_reset(void)
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bool fpga_ram_check(void)
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void fpga_xclk_on(void)
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void fpga_camera_on(void)
Turn on the camera.
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void fpga_camera_off(void)
Turn off the camera.
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void fpga_mic_on(void)
Turn on the microphone.
- Returns
True if it has been effectively turned on.
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void fpga_mic_off(void)
Turn off the microphone.
- Returns
True if it has been effectively turned off.
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void fpga_disp_live(void)
Enable the live streaming of the camera directly to the screen.
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void fpga_disp_busy(void)
Enable the busy indicator: gray screen.
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void fpga_disp_bars(void)
Enable the display of 8 vertical color bars to the screen.
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void fpga_disp_RB_shift(bool enable)
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void fpga_disp_off(void)
Disable the red-blue shift chrominance correction.
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void fpga_image_capture(void)
Enable the capture of a frame of the video.
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void fpga_video_capture(void)
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void fpga_prep_read_audio(void)
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void fpga_resume_live_video(void)
Resume live video feed and clear the checksum.
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void fpga_replay_rate(uint8_t repeat)
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bool fpga_capture_done(void)
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void fpga_set_zoom(uint8_t level)
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void fpga_set_luma(bool turn_on)
Turn the luma correction of the camera on or off asking the FPGA over SPI.
Convenient for testing.
- Parameters
turn_on – Whether to activate or disable the luma correction.
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void fpga_set_display(uint8_t mode)
Set the display mode of the screen controlled by FPGA over SPI.
- Parameters
mode – 0=off, 1=disp_cam, 2=disp_busy, 3=disp_bars.
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void fpga_get_version(uint8_t *major, uint8_t *minor)
Read the version register of the FPGA.
- Parameters
major – Major revision number.
minor – Minor revision number.
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void fpga_discard_buffer(void)
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void fpga_check_pins(char const *msg)