fpga

group fpga

Driver for configuring the SPI-controlled FPGA.

It controls the low-level read/write with the registers and bulk data transfer. It provides a higher level API for:

  • the FPGA itself,

  • the Camera data path,

  • the Microdisplay data path,

  • the Microphone data,

  • the Checksum calculation,

Defines

fpga_check_reg(reg)
FPGA_BUFFERS_SUPPORTED

number of capture buffers supported

FPGA_NUM_VIDEO_FRAMES
FPGA_FRAME_SIZE
FPGA_SYSTEM_CONTROL

RW.

FPGA_DISPLAY_CONTROL

RW.

FPGA_MEMORY_CONTROL

RW.

FPGA_LED_CONTROL

RW.

FPGA_CAMERA_CONTROL

RW.

FPGA_SYSTEM_STATUS

RO.

FPGA_WR_BURST_SIZE_LO

RW.

FPGA_WR_BURST_SIZE_HI

RW.

FPGA_BURST_WR_DATA

RW.

FPGA_RD_BURST_SIZE_LO

RW.

FPGA_RD_BURST_SIZE_HI

RW.

FPGA_BURST_RD_DATA

RO.

FPGA_CAPTURE_CONTROL

RW.

FPGA_CAPTURE_STATUS

RO.

FPGA_CAPTURE_SIZE_0

RO.

FPGA_CAPTURE_SIZE_1

RO.

FPGA_CAPTURE_SIZE_2

RO.

FPGA_CAPTURE_SIZE_3

RO.

FPGA_CAPT_FRM_CHECKSUM_0

RO.

FPGA_CAPT_FRM_CHECKSUM_1

RO.

FPGA_REPLAY_RATE_CONTROL

RW.

FPGA_MIC_CONTROL

RW.

FPGA_CAPT_BYTE_COUNT_0

RO.

FPGA_CAPT_BYTE_COUNT_1

RO.

FPGA_CAPT_BYTE_COUNT_2

RO.

FPGA_CAPT_BYTE_COUNT_3

RO.

FPGA_VERSION_MINOR

RO FPGA build minor version number.

FPGA_VERSION_MAJOR

RO FPGA build major version number.

FPGA_REGISTER_EXISTS(reg)
BIT(n)
FPGA_RST_SW

Software reset. Set to 1, it will auto-reset to 0.

FPGA_SYSTEM_CONTROL_DEFAULT
FPGA_EN_RB_SHIFT

enable Red Blue shift (for display optics compensation)

FPGA_DISP_BARS

display 8 vertical color bars

FPGA_DISP_BUSY

display busy indicator (grey screen)

FPGA_DISP_CAM

display on, video from camera/buffer

FPGA_DISP_OFF
FPGA_DISPLAY_CONTROL_DEFAULT

default value on reboot/reset

FPGA_MEMORY_CONTROL_DEFAULT

default value on reboot/reset

FPGA_LED_CONTROL_DEFAULT

default value on reboot/reset

FPGA_EN_LUMA_COR

enable luma correction for zoom mode

FPGA_EN_ZOOM

enable zoom

FPGA_ZOOM
FPGA_ZOOM_SHIFT
FPGA_ZOOM_MASK
FPGA_EN_CAM

enable camera

FPGA_EN_XCLK

enable 24MHz XCLK to camera

FPGA_CAMERA_CONTROL_DEFAULT
FPGA_CAPT_FIFO_UNDERRUN

camera FIFO underrun (empty error)

FPGA_CAPT_FIFO_OVERRUN

camera FIFO overrun (full error)

FPGA_CAM_FIFO_UNDERRUN

camera FIFO underrun (empty error)

FPGA_CAM_FIFO_OVERRUN

camera FIFO overrun (full error)

FPGA_RD_ERROR

read error

FPGA_WR_ERROR

write error

FPGA_MEM_INIT_DONE

memory initialization done

FPGA_SYSTEM_STATUS_DEFAULT
FPGA_CLR_CHKSM

[1] clear checksum calculation for previously captured frame/video/audio

FPGA_RESUME_FILL

[1] resume video; only effective if eAPT_EN is set

FPGA_RD_AUDIO

select for read (after capture) of audio

FPGA_CAPT_AUDIO

select for capture of audio (can be with video)

FPGA_CAPT_VIDEO

select for capture of video

FPGA_CAPT_FRM

select for capture of single frame

FPGA_CAPT_EN

[1] enable capture, use together with 1 or 2 of CAPT_FRM, _VIDEO, _AUDIO

FPGA_CAPTURE_CONTROL_DEFAULT
FPGA_VIDEO_CAPT_DONE

Last byte of video capture read. Indicates captured video read completely.

FPGA_AUDIO_CAPT_DONE

Last byte of audio capture read. Indicates captured audio read completely.

FPGA_FRAME_CAPT_DONE

Last byte of frame capture read. Indicates captured frame read completely.

FPGA_START_OF_CAPT

Start of capture indicates start of video frame or start of audio. This is to make sure that the MCU is in sync with FPGA.

FPGA_CAPT_RD_VLD

Captured data is valid and available for read.

FPGA_CAPTURE_STATUS_DEFAULT
FPGA_REP_RATE_CONTROL

in replay mode, number of times each frame in buffer is repeated to OLED

FPGA_REP_RATE_SHIFT
FPGA_REP_RATE_MASK
FPGA_REPLAY_RATE_CONTROL_DEFAULT

default value on reboot/reset

FPGA_EN_MIC

enable mic

FPGA_MIC_CONTROL_DEFAULT

default value on reboot/reset

Functions

void fpga_prepare(void)

Preparations for GPIO pins before to power-on the FPGA.

void fpga_init(void)

Initial configuration of the registers of the FPGA.

void fpga_deinit(void)
void fpga_write_register(uint8_t addr, uint8_t byte)

Write a byte to the FPGA over SPI using a bridge protocol.

Parameters
  • addr – The address of the FPGA to write to.

  • byte – The byte to write on that address.

uint8_t fpga_read_register(uint8_t addr)

Read a byte to the FPGA over SPI using a bridge protocol.

Parameters

addr – The address of the FPGA to read from.

Returns

The value read at that address.

void fpga_write_burst(uint8_t *buf, uint16_t len)

Write a multi-byte burst of byte to the FPGA over SPI.

The address is implicit.

Parameters
  • buf – The buffer containing the data.

  • len – The size of that buffer.

void fpga_read_burst(uint8_t *buf, uint16_t len)

Read a burst of data from the FPGA.

The address is implicit.

Parameters
  • data – The buffer that will be written to.

  • len – The number of bytes to read onto that buffer.

uint32_t fpga_get_capture_size(void)
uint32_t fpga_get_bytes_read(void)
uint16_t fpga_get_checksum(void)
uint16_t fpga_calc_checksum(uint8_t *bytearray, uint32_t len)
uint16_t fpga_checksum_add(uint16_t checksum1, uint16_t checksum2)
bool fpga_is_buffer_at_start(void)
bool fpga_is_buffer_read_done(void)
bool fpga_test_reset(void)
bool fpga_ram_check(void)
void fpga_xclk_on(void)
void fpga_camera_on(void)

Turn on the camera.

void fpga_camera_off(void)

Turn off the camera.

void fpga_mic_on(void)

Turn on the microphone.

Returns

True if it has been effectively turned on.

void fpga_mic_off(void)

Turn off the microphone.

Returns

True if it has been effectively turned off.

void fpga_disp_live(void)

Enable the live streaming of the camera directly to the screen.

void fpga_disp_busy(void)

Enable the busy indicator: gray screen.

void fpga_disp_bars(void)

Enable the display of 8 vertical color bars to the screen.

void fpga_disp_RB_shift(bool enable)
void fpga_disp_off(void)

Disable the red-blue shift chrominance correction.

void fpga_image_capture(void)

Enable the capture of a frame of the video.

void fpga_video_capture(void)
void fpga_prep_read_audio(void)
void fpga_resume_live_video(void)

Resume live video feed and clear the checksum.

void fpga_replay_rate(uint8_t repeat)
bool fpga_capture_done(void)
void fpga_set_zoom(uint8_t level)
void fpga_set_luma(bool turn_on)

Turn the luma correction of the camera on or off asking the FPGA over SPI.

Convenient for testing.

Parameters

turn_on – Whether to activate or disable the luma correction.

void fpga_set_display(uint8_t mode)

Set the display mode of the screen controlled by FPGA over SPI.

Parameters

mode – 0=off, 1=disp_cam, 2=disp_busy, 3=disp_bars.

void fpga_get_version(uint8_t *major, uint8_t *minor)

Read the version register of the FPGA.

Parameters
  • major – Major revision number.

  • minor – Minor revision number.

void fpga_discard_buffer(void)
void fpga_check_pins(char const *msg)